Designing decoder hardware and firmware - Printable Version

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Designing decoder hardware and firmware - Dr_C2 - 22nd-Nov-23

Series of photos of a recent decoder design which has four variants - two are DPR and two are F1. In each case one is for control via track packets (SSD and D132) and the other is for radio/track packets.

The Rover SD1s have the DPR track packet variant.

Sorry the photos are rotated - room for editorial improvement!

c


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RE: Designing decoder hardware and firmware - Dr_C2 - 22nd-Nov-23

[attachment=32589]

Here is the panellised PCB with DPR designs on the left and F1 designs on the right. The track packet variants are towards the rear and the radio variants towards the front.

As you will see the core design is common to all four variants. The extra space available on the DPR variants is used for standard Hornby style JST sockets for power/motor and lights plus a 10-way FFC accessory port. Based on wise advice from Giovanni in NZ the F1 vaiant includes lighting circuits and a lighting JST socket option - so they will fit nicely into Scalextric BMC Minis, Cobras and of course the ultimate challenge, Policar classic F1s.

Microprocessor options include 16F1503, 16F1615, 16F1619, ATtiny3224, ATtiny3226 and nRF52832. So plenty of options.

The SD1s have demonstrated core function… they drive smoothly, brake correctly, strobe on all desired IDs and, as shown above, lighting circuits function correctly too.

Coding is in C++ for portability between the various microcontroller platforms. As you would expect firmware is work in progress.

c

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